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Fault-Tolerant Implementations of Physically Unclonable Functions on FPGA

  • Durga Prasad Sahoo
  • Arnab BagEmail author
  • Sikhar Patranabis
  • Debdeep Mukhopadhyay
  • Rajat Subhra Chakraborty
Chapter
Part of the Internet of Things book series (ITTCC)

Abstract

Most of the faults in circuits or systems occur due to the unintentional but natural phenomenon (e.g. imperfection in manufacturing process or significant change in the working environment), and thus, these faults are often follow a pattern and comparatively easier detect than the intentional faults. In the context of secure design/system, the adversary (intentionally) injects some faults in the system to bypass the security protection or reveal secret information. Since the adversaries’ fault injection objectives are often very subjective, it is difficult to find a pattern among the faults in a system, and this makes the fault detection and fault recovery difficult in a secure system. In this chapter, we discuss possible intentional faults in an emerging hardware security primitive, known as Physically Unclonable Functions (PUFs). We show how the faults vary over the PUF designs and its applications. In addition, we explain different fault detection circuits and fault recovery techniques which are specific to PUF designs and their implementations on FPGA platforms.

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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  • Durga Prasad Sahoo
    • 1
  • Arnab Bag
    • 2
    Email author
  • Sikhar Patranabis
    • 2
  • Debdeep Mukhopadhyay
    • 2
  • Rajat Subhra Chakraborty
    • 2
  1. 1.Bosch India (RBEI/ESY)BengaluruIndia
  2. 2.IIT KharagpurKharagpurIndia

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