The System Verification Breakdown Method

Abstract

High integrated and complex systems are more and more scattered and common in people lives. Even without the exact feeling of this means, they hope for the best product. This desire implicate in system manufactures improve knowledge and create solutions with more advanced technologies to satisfy consumers expectations. Verification have been done at the end of process development, but it have resulted in difficulties to manufacturers because is very expansive and hard to implement any required modifications at this point of development process. Thus, many manufactures have started verification process at begin of development, decreasing erroneous implementations. This paper is intended to show an intuitive method possible to apply in any cases, using block diagrams, that assists generate test cases procedures, since when development starts, making relationship among system interfaces, subsystems and functions, enabling tests traceability and tests coverage analysis. In cases where manufacturer develops same kind of products, the block diagram will be easily reused to a new one, including or removing systems, subsystems and functions, adapting it to new features and project requirements. The propose is starting developments doing the things right earlier as possible.