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Micro-relay Technologies

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Micro-Relay Technology for Energy-Efficient Integrated Circuits

Part of the book series: Microsystems and Nanosystems ((MICRONANO,volume 1))

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Abstract

In this chapter, we first review various process integration issues for micro-relay fabrication, followed by a detailed discussion of the prototype relays fabricated using a CMOS-compatible poly-Si0.4Ge0.6 surface micromachining process. We also present the results of various prototype relay technologies recently developed in various research laboratories.

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Authors and Affiliations

  1. Intel Corporation, Hillsboro, OR, USA

    Hei Kam

  2. Lion Semiconductor, Inc., Berkeley, CA, USA

    Fred Chen

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  1. Hei Kam
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  2. Fred Chen
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Kam, H., Chen, F. (2015). Micro-relay Technologies. In: Micro-Relay Technology for Energy-Efficient Integrated Circuits. Microsystems and Nanosystems, vol 1. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2128-7_3

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  • DOI: https://doi.org/10.1007/978-1-4939-2128-7_3

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4939-2127-0

  • Online ISBN: 978-1-4939-2128-7

  • eBook Packages: EngineeringEngineering (R0)

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