WLCSP Assembly

  • Shichun Qu
  • Yong Liu


Assembly of WLCSP components involves surface mounting technology (SMT), which includes pickup WLCSP components from tape and place them onto a printed circuit board (PCB), solder reflow, and optional underfill. Figure 9.1 provides a schematic diagram of a typical assembly line setup involving WLCSP, in which solder paste or flux is first printed or dispensed on the PCB respectively before WLCSP pick and placement. Reflow is followed to finish the solder joint formation between the WLCSP component(s) and PCB. Optical or X-ray inspections are arranged at various stages of assembly line to ensure correct solder paste printing (height, area, and volume of the solder paste bricks deposited on the PCB soldering pads), accurate component placement (XY offset and skewness), and proper solder joint formation. In-circuit test (ICT) is an electrical probe test on the assembled PCBs, checking for shorts, opens, resistance, capacitance, and other basic quantities which will show whether the assembly was correctly fabricated. Post solder reflow, underfill could be applied after flux clean to provide the needed protections to WLCSPs and solder joints going through subsequent assembly processing steps and to ensure robust reliability of the WLCSP devices in the everyday usage. Underfill is especially desired when die size is big or when low-K dielectrics are present in the WLCSP.


Solder Joint Print Circuit Board Solder Ball Solder Bump Fine Pitch 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    Schiebel, G.: Criteria for reliable high-speed CSP mounting. Chip Scale Rev. September 1998Google Scholar
  2. 2.
    IPC-2221: Generic Standard on Printed Board DesignGoogle Scholar
  3. 3.
    IPC-SM-7351: Generic Requirements for Surface Mount Design and Land Pattern StandardGoogle Scholar
  4. 4.
    IPC-7525: Stencil Design GuidelineGoogle Scholar
  5. 5.
    J-STD-004: Requirements for Soldering FluxesGoogle Scholar
  6. 6.
    IPC/EIA J-STD-001: Requirements for Soldered Electrical and Electronic AssembliesGoogle Scholar
  7. 7.
    IPC-TM-650: Test MethodsGoogle Scholar
  8. 8.
    IPC-9701: Performance Test Methods and Qualification Requirements for Surface Mount Solder AttachmentsGoogle Scholar
  9. 9.
    IPC/JEDEC J-STD-020: Moisture/Reflow Sensitivity Classification for Non-hermetic Solid-State Surface Mount DevicesGoogle Scholar
  10. 10.
    JEITA Std EIAJ ED-4702A: Mechanical Stress Test Methods for Semiconductor Surface Mounting DevicesGoogle Scholar
  11. 11.
    JESD22-A113: Preconditioning Procedures of Plastic Surface Mount Devices Prior to Reliability TestingGoogle Scholar
  12. 12.
    IPC/JEDEC-9702: Monotonic Bend Characterization of Board-Level InterconnectsGoogle Scholar
  13. 13.
    IPC/JEDEC J-STD-033: Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount DevicesGoogle Scholar
  14. 14.
    CEI IEC 61760-1: Surface mounting technology—Part 1: Standard method for the specification of surface mounting components (SMDs)Google Scholar
  15. 15.
    IEC 60068-2-21 Ed. 5: Environmental Testing—Part 2-21: Tests—Test U: Robustness of terminations and integral mounting devicesGoogle Scholar
  16. 16.
    JESD22-B104: Mechanical ShockGoogle Scholar
  17. 17.
    JESD22-B110: Subassembly Mechanical Shock—Free state, mounted portable state, mounted fixed stateGoogle Scholar
  18. 18.
    JESD22-B111: Board Level Drop Test Method of Components for Handheld Electronic ProductsGoogle Scholar
  19. 19.
    JESD22-B113: Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of Components for Handheld Electronic ProductsGoogle Scholar
  20. 20.
    IPC-7095: Design and Assembly process implementation for BGAsGoogle Scholar
  21. 21.
    Fan, X.J., Varia, B., Han, Q.: Design and optimization of thermo-mechanical reliability in wafer level packaging”. Microelectron. Reliab. 50, 536–54 (2010)CrossRefGoogle Scholar
  22. 22.
    Syed, A., et al.: Advanced analysis on board trace reliability of WLCSP under drop impact. Microelectron. Reliab. 50, 928–936 (2010)CrossRefGoogle Scholar
  23. 23.
    Liu, Y., Qian, Q., Qu, S., et al.: Investigation of the Assembly Reflow Process and PCB Design on the Reliability of WLCSP”, 62nd ECTC, San Diego, California, June 2012Google Scholar
  24. 24.
    Schiebel, G.: Criteria for Reliable High-Speed CSP Mounting. Chip Scale Rev. September 1998Google Scholar
  25. 25.
    Oresjo S.: When to Use AOI, When to Use AXI, and When to Use Both”, Nepcon West, December 2002Google Scholar

Copyright information

© Springer Science+Business Media New York 2015

Authors and Affiliations

  • Shichun Qu
    • 1
  • Yong Liu
    • 2
  1. 1.Fairchild SemiconductorSan JoseUSA
  2. 2.Fairchild SemiconductorSouth PortlandUSA

Personalised recommendations