An Extended WAM Based Architecture for OR-Parallel Prolog Execution
The paper describes the performance evaluation and the VLSI design of a parallel architecture for high speed execution of Prolog programs. The achievement of very high performances makes sequential execution unsuitable, so parallel models have to be studied and adopted (Nakajima 1988). Our study starts from an existing VLSI sequential Prolog processor (PROXIMA), based on the Warren Abstract Machine; the idea is to extend it in order to support OR-parallel execution models, so that multiprocessor systems could be designed and tested.
KeywordsChoice Point Memory Architecture Distribute Memory System Shared Memory Architecture Distribute Memory Architecture
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