A Comparison Study Between 2D VLSI Circuits and 3D Circuits Based on Multifunctional Smart Pixels
The paper presents the transformation possibilities of a planar circuit designed for VLSI onto a virtual 3D circuit built-up with smart pixel processing layers connected in the space by using optical interconnections. Optical chip-to-chip interconnections are proposed to overcome one of the major problems in current VLSI technolgy: pin limitation and limited off-chip bandwidth , . In this paper we present how the third dimension can be used not only for quantitative but also for qualitative improvements. The 2D VLSI circuit, which is the starting point of the study, is an optimal purely systolic adder presented by Kühnel . This circuit was modified towards a conceptual design based on stacked smart pixel processing planes. The performances of the 3D and 2D solution are compared with respect to the latency, i.e. the time necessary to carry out one single operation, the period time, i.e. the time that passes between two successive operations, which is equal to the reciprocal of the throughput. For the transformation process of the planar circuit into the third dimension three different approaches have been applied.
KeywordsBoolean Function Processing Cell Optical Interconnection Optical Input Planar Circuit
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- 1.Th. Maurin, Ph. Laianne, and P. Chavel, “Comparison between electrical and optical interconnects”, in Perspectives for Parallel Optical Interconnect., Ph. Lalanne, P. Chavel, eds, Springer 1993.Google Scholar
- 3.L. Kühnel, Optimal purely systolic addition, in: Proceedings ARITH-10, Grenobl., IEEE Computer Society Press (1991).Google Scholar
- 4.D. Fey, Transformation of a 2-D VLSI Systolic Adder Circuit in 3-D Circuits Using Optical Interconnections, in: Proceedings EURO-PAR ′96, Lyo., Springer Lecture Notes in Computer Science, (1996).Google Scholar
- 5.N. McArdle, J.F. Snowdon, M.R. Taghizadeh, Parallel processing architectures with dynamic optical interconnections using spatial light modulators, in: Proceedings Int. Conf. on Opt. Comp., Edinburg., IOP Publishing (1995).Google Scholar
- 6.D.A.B. Miller, Hybrid SEED — massively parallel optical interconnections for silicon IC., in: Proceedings MPPOI’95, San Antoni., IEEE Computer Society Press (1995).Google Scholar
- 7.J. Depreitere, H. Neefs, H. van Marck, J. Van Campenhout, K. Baets, B. Dhoedt, H. Thienpont, and I. Veretennicoff, An optoelectronic 3-D field programmable gate array, in. Procceedings 4 th Int. Workshop on Field-Programmable Logic and Applications, Pragu., Springer-Verlag, September 1994.Google Scholar
- 8.Technical manual of ARPA/AT&T Hybrid SEED Worksho., 1995.Google Scholar