Abstract
Timing constraints are an integral part of the design of embedded real-time systems. They affect most system-level decisions, in particular hardware/software partitioning, allocation and scheduling. Modem embedded systems execute a large set of tasks on a heterogeneous architecture in an increasingly dynamic environment. This necessitates the specification of timing constraints which consider unknown and dynamic situations with event jitter and burst. Different system-level analysis and implementation techniques assume different types of constraints as well as specification models and target architectures. It is thus important to combine those specialised solutions for system-level design of complex and heterogeneous embedded systems. In this chapter, we propose an efficient representation for timing constraints that allows to combine different specification, analysis and implementation techniques for complex embedded systems.
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References
The MathWorks, Inc., “Using Simulink, Version 3”, Jan. 1999
C. J. Fidge, “Real-Time Schedulability Tests for Preemptive Multitasking” in Real-Time Systems Journal, vol. 14, 1998
R. Ernst, “Codesign of Embedded Systems: Status and Trends”, in IEEE Design & Test of Computers, Apr. 1998
R. Gerber, W. Pugh and M. Saksena, “Parametric Dispatching of Hard Real-Time Tasks”, in IEEE Transaction on Computers, Mar. 1995
T. Yen and W. Wolf, “Performance Estimation for Real-Time Distributed Embedded Systems”, in IEEE Transactions on Parallel and Distributed Systems, Nov. 1998
K. W. Tindell, “An Extendible Approach for Analysing Fixed Priority Hard Real-Time Systems”, in Journal of Real-Time Systems, Mar. 1994
K. Gresser, “An Event Model for Deadline Verification of Hard Real-Time Systems”, in Proceedings 5th Euromicro Workshop on Real-Time Systems, Oulu, Finland, 1993
F.S. de Boer, M. Gabbrielli and M.C. Meo, “A Timed Concurrent Constraint Language”, in Journal on Information and Computation,to appear
T. Amon, “Specification, Simulation, and Verification of Timing Behavior”, PhD dissertation, University of Washington, 1993
A. Dasdan, “Timing Analysis of Embedded Real-Time Systems”, Ph.D dissertation, University of Illinois at Urbana-Champaign, 1999
Open SystemC Initiative, “SystemC” http://www.systemc.org/
D. D. Gajski et al., “SpecC: Specification Language and Methodology”, Kluwer Academic Publishers, Mar. 2000
Systems Level Design Language community, “Rosetta Reference”, http://www.sldl.org/
D. Ziegenbein, K. Richter, R. Ernst, L. Thiele and J. Teich, “SPI - A System Model for Heterogeneously Specified Embedded Systems”, IEEE Transactions on VLSI Systems,to appear 200
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Jersak, M., Ziegenbein, D., Ernst, R. (2002). A General Approach to Modelling System-Level Timing Constraints. In: Mignotte, A., Villar, E., Horobin, L. (eds) System on Chip Design Languages. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-6674-5_24
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DOI: https://doi.org/10.1007/978-1-4757-6674-5_24
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5281-3
Online ISBN: 978-1-4757-6674-5
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