A 3.3-V CMOS Switched-Current Delta-Sigma Modulator
This chapter presents the design of a second-order switched-current delta-sigma modulator having equal first and second integrator output swing. It was implemented using the clock-feedthrough compensated first-generation switched-current circuits described in chapter 4. Experimental results show that the modulator has a small chip area, low supply voltage, and low power dissipation. The measured dynamic range is approximately 11 bits.
KeywordsMemory Cell Current Comparator Analog Integrate Circuit Signal Swing Measured Dynamic Range
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