It has been about twelve years since the advent of the switched-current technique. In the early days anything seemed possible: high speed, low voltage, inherently mismatch-free building blocks, and even low power dissipation were the predicted benefits of this new and exciting technique. Because no other components than MOS transistors were required and the dynamic range would no longer be hard-limited by the supply voltage, a technique that was truly compatible with the rapid development in digital VLSI technology had been found. With this technique it became possible to integrate analog interfacing circuits, A/D and D/A, with the digital signal processing circuits in order to have cost effective one-chip solutions. As the SI technique started its maturing process, it became evident that it also had a number of problems to be solved: Clock-feedthrough (CFT) or charge-injection from sampling switches was far more dominant than it had ever been in SC circuits. Thermal noise also seemed to be much more present ‘in current-mode circuits. Would it ever be possible to achieve a signal-to-noise ratio equivalent to that in voltage-mode circuits? Accurate matching of drain currents became more important than before, and also the linearity of a current mirror. Another significant issue was to develop new realizations of necessary building blocks with current input and output.
KeywordsCurrent Mirror VHDL Code Sampling Switch Sampling Jitter Exciting Technique
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