Communication Analysis and Synthesis
Communication analysis and synthesis is an essential step in distributed system co-synthesis. Many embedded systems use custom communication topologies and the communication links are often a significant part of the system cost. This chapter describes new techniques  for the analysis and synthesis of the communication requirements of embedded systems during co-synthesis.
Most previous work uses two kinds of communication topologies: either a pointto-point communication link for each pair of processors, or a single bus/network for all interprocess communication. Embedded systems are application specific, and they can have ad hoc architecture with several buses, each with a different speed and a different number of PEs connected to it, according to the real-time constraints imposed on individual tasks. For instance, a bus connecting five CPUs may be implemented for light communications, while another dedicated bus is used by only two CPUs for time-critical messages. Rosebrugh and Kwang  described a pen-based system built from four processors of different types: a Motorola MC68331, a Motorola MC68HC05C4, a Hitachi 63484, and an Intel 8051. There are five buses with different connections for interprocessor communication in their pen-based system: power management bus, serial bus, video bus, digitizer bus, and system bus, as shown in Figure 6.1. The synthesis of communication is important for distributed embedded system design.
Communication is the bottleneck in many embedded systems, because communication links add both chip and board costs, and designers frequently underestimate peak load. Design decisions based on average communication requirements may lead to an infeasible design.
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