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Sparse Crossbar Design

  • Guy Lemieux
  • David Lewis
Chapter

Abstract

This chapter presents a number of sparse crossbar designs and a general method for evaluating and constructing sparse crossbars is developed. The construction method produces highly routable sparse crossbars which are area-efficient. The evaluation method uses a Monte Carlo technique to estimate the percentage of random test vectors that can be routed. The routability of each test vector is determined perfectly using a network flow algorithm. The construction method attempts to maximise the spread of the switch locations, such that any given subset of input wires can connect to as many output wires as possible.

The hardest test vectors to route are those which attempt to use all of the crossbar outputs. Results indicate that area-efficient sparse crossbars can be constructed by using more outputs than required and a sufficient number of switches. Using a few specific case studies, it is shown that sparse crossbars with about 90% fewer switches than a full crossbar can be constructed, and these crossbars are capable of routing over 95% of randomly chosen test vectors. In one case, a new switch matrix which can replace the one in the Altera FLEX8000 family is shown. This new switch matrix uses approximately 14% more transistors, yet can increase the routability of the most difficult test vectors from 1% to over 96%.

Keywords

Programmable Logic Interconnection Network Test Vector Switch Matrix Switch Pattern 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 2004

Authors and Affiliations

  • Guy Lemieux
    • 1
  • David Lewis
    • 2
    • 3
  1. 1.Department of Electrical and Computer EngineeringUniversity of British ColumbiaVancouverCanada
  2. 2.Altera Toronto Technology CentreAltera CorporationCanada
  3. 3.Edward S. Rogers Senior Department of Electrical and Computer EngineeringUniversity of TorontoTorontoCanada

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