Skip to main content

Abstract

Complex electronic systems can be implemented in more than one physical unit, i.e., logic and memory can be implemented on one or more chips, chips can be interconnected using one or more modules, and modules can be placed on one or more backplanes which can in turn be placed into one or more enclosures. Throughout the design of a system, engineers are faced with making decisions about how to divide a system’s functionality. Partitioning is the design phase in which a designer divides the system’s functionality into parts which fit into available physical units. Partitioning is necessary to accommodate varied design constraints, to take advantage of existing components and subsystems, to facilitate parallel development activities, to provide access, to environmentally protect, for testability, for maintainability, and to achieve reconfigurability.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. T. S. Payne and W. M. vanClemput, “Automated Partitioning of Hierarchically Specified Digital Systems” Proceedings of the 19th Design Automation Conference, pp. 182 - 192, 1982.

    Google Scholar 

  2. K. Kucukcakar and A. C. Parker, “CHOP: A Constraint-Driven System-Level Partitioner,” Proceedings of the 28th ACM/IEEE Design Automation Conference, pp. 514 - 519, 1991.

    Google Scholar 

  3. M. L. Resnick, SPARTA: A System Partitioning Aid, IEEE Transactions on Computer-Aided Design, vol. CAD-5, pp. 490-498, October, 1986.

    Google Scholar 

  4. D. K. Wilson, “Partitioning-The Payoff Role in Telecommunication Systems Design,” Proceedings of the SPIE International Conference on Advances in Interconnection and Packaging, SPIE Vol. 1390, pp. 537 - 547, 1990.

    Google Scholar 

  5. D. Gajski, N. Dutt, A. Wu, and S. Lin, High-Level Sythesis - Intro-duction to Chip and System Design, Kluwer Academic Publishers, 1992.

    Google Scholar 

  6. S. C. Johnson, “Hierarchical Clustering Schemes,” Psychometrika, pp. 241-254, September, 1967.

    Google Scholar 

  7. K. H. Kernighan and S. Lin, “An Efficient Heuristic Procedure for Partitioning Graph,” Bell Systems Technical Journal, vol. 49, no. 2, pp. 291 - 307, February, 1970.

    MATH  Google Scholar 

  8. S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, “Optimization by Simulated Annealing,” Science, vol. 220, no. 4598, pp. 671 - 680, 1983.

    Article  MathSciNet  MATH  Google Scholar 

  9. D. K. Wilson, “Topological Aspects of Systems Partitioning,” Proceedings of Design Policy Conference, Royal College of Art, London, UK, pp. 148 - 154, 1982.

    Google Scholar 

  10. A. C. Hartmann, “Software or Silicon? The Designer’s Option,” Proceedings of the IEEE, vol. 74, no. 6, pp. 861 - 874, June, 1986.

    Google Scholar 

  11. I. Sommerville, Software Engineering, Third Edition, Addison Wesley, 1989.

    MATH  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 1994 Springer Science+Business Media New York

About this chapter

Cite this chapter

Sandborn, P.A., Moreno, H. (1994). Design Partitioning. In: Conceptual Design of Multichip Modules and Systems. The Springer International Series in Engineering and Computer Science, vol 250. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4841-3_4

Download citation

  • DOI: https://doi.org/10.1007/978-1-4757-4841-3_4

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-5137-3

  • Online ISBN: 978-1-4757-4841-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics