Abstract
A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively-parallel analog hardware required for implementing neural networks. The fundamental concepts are the frequency multiplexing of signals on a single line, and their wave-parallel processing without decomposition. This paper discusses the realization of a Hopfield-type massively-connected neural network, and shows that the WPC-based network exhibits much lower topological complexity compared with the original network. We also investigate the possible implementation of WPC using the present MOS technology, and discuss the performance evaluation in terms of the degree of multiplexing and the processing speed.
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Yuminaka, Y., Sasaki, Y., Aoki, T., Higuchi, T. (1998). Design of Neural Networks Based on Wave-Parallel Computing Technique. In: Chua, L.O., Gulak, G., Pierzchala, E., Rodríguez-Vázquez, A. (eds) Cellular Neural Networks and Analog VLSI. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-4730-0_7
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DOI: https://doi.org/10.1007/978-1-4757-4730-0_7
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