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Introduction

  • J. Vandenbussche
  • G. Gielen
  • M. Steyaert
Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 738)

Abstract

The (CMOS) semiconductor industry has continued to prosper since the early 70s. The even decreasing feature size has provided improved functionality at a reduced cost. An historical observation by Intel executive Gordon Moore noted that the market demand (and the semiconductor industry response) for functionality per chip (transistors, bits) doubles every 1.5 to 2 years. Equally the microprocessor unit (MPU) performance (million instructions per second: MIPS) doubles every 1.5 to 2 years, as shown in Fig. 1.1. Device size linear features have indeed decreased at a rate of about 70% every three years for most of the industry’s history. Acceleration to a 2-year cycle has been experienced in the most recent years. The cost per function has simultaneously decreased at an average rate of about 25–30%/year/function [ITRS 99]. Today’s microprocessors contain over 50 million transistors and have crossed the 1000 MIPS barrier running at clock speeds above 2 GHz [GEL01, AND 01]. By 2005 gate lengths of 80 nm are to be expected, enabling 700 million transistors to be integrated on a single die [ITRS 01].

Keywords

Intellectual Property Analog Design Design Cost Productivity Growth Rate Core Intellectual Property 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • J. Vandenbussche
    • 1
  • G. Gielen
    • 2
  • M. Steyaert
    • 2
  1. 1.AnSem N. V.Belgium
  2. 2.K.U. LeuvenBelgium

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