The trend towards low-voltage low-power single-chip systems has been growing quickly due to the increasing demand of smaller size and longer battery life for portable applications in all market segments including telecommunications, computers and consumer electronics. Meanwhile, single-chip implementation of both analog and digital systems in standard CMOS technology is recommended for lower cost, superior performance and smaller size. However, single-chip systems are not only difficult to design and implement but also face a new critical constraint imposed by voltage scaling in the sub-micron CMOS technology in recent years. Sub-micron CMOS technology shrinks the transistor size to boost for higher speed and lower power consumption, but it imposes reliability problems to the transistors at high voltage operation. As predicted by the Semiconductor Industry Association [SIA 99], MOS transistors are required to operate in less than 1.2 V by 2004 and 0.9 V by 2008, while their threshold voltages are kept more or less unchanged (VT ≈ 0.7 V ~ 0.9 V) to avoid excessive leakage current. At low-voltage operation (as low as 1 V), digital circuits can still attain reasonable performance, but most of the analog circuits even do not function. Nowadays, most analog circuits still need a supply voltage of at least 2 – 3 V for acceptable performance.
KeywordsSettling Active Element
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