Abstract
Tile-size selection is known to be a complex problem. This paper develops a new selection algorithm targeting relaxation codes. Unlike previous algorithms, this new algorithm considers the effect of loop skewing, which is necessary to tile such codes. It also estimates loop overhead and incorporates them into the execution cost model, which turns out to be critical to the decision between tiling a single loop level vs. tiling two loop levels. Our preliminary experimental results show a significant impact of these previously ignored issues on the execution time of tiled loops in relaxation codes. In our experiments, we measured the cache miss rate and the execution time of five benchmark programs on a single processor and we compared our algorithm with previous algorithms. Our algorithm achieves an average speedup of 1.27 to 1.63 over all the other algorithms.
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Song, Y., Li, Z. (2001). Impact of Tile-Size Selection for Skewed Tiling. In: Lee, G., Yew, PC. (eds) Interaction between Compilers and Computer Architectures. The Springer International Series in Engineering and Computer Science, vol 613. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3337-2_3
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DOI: https://doi.org/10.1007/978-1-4757-3337-2_3
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