Reusing IPS to Implement a Sparc® Soc
We present the gained experience dealing with the implementation of a SOC, reusing existing soft-cores. The application of a hardware-software virtual prototyping (co-simulation) approach used to functionally verify the system is also presented. This is specifically tackling the advantages and disadvantages of such a approach. The preparation of the deliverables-list needed to offer the soft and hard-cores as part of the semiconductor IP-products catalog. The communication description between the co-simulation and the soft-core management environment is presented in a separate section.
KeywordsCache Memory Automatic Test Equipment Register Window Float Point Unit Remote Terminal Unit
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