Power Efficient Synthesis of Sum-of-Products Computations

Abstract

Sum-of-products computations are widely used in multimedia and communications systems. Techniques for the power efficient data path synthesis of sum-of-products computations are presented in this chapter. Simple and efficient heuristics for the instruction-level scheduling and assignment steps are described. These steps are crucial sub-steps of the custom processor synthesis stage of the system level design meta-flow proposed in chapter 2. The proposed heuristics exploit the inherent independence of the sum-of-products computations to formulate the synthesis tasks using the concept of the Traveling Salesman’s Problem. In this way the synthesis tasks can be solved very efficiently. Different partly static cost functions are proposed to drive the synthesis tasks. The proposed cost functions target the power consumption either in the buses connecting the functional units with the storage elements or in the functional units. The partly static nature of the proposed cost functions reduces the time of the synthesis procedure. Experimental results from different relevant digital signal processing algorithmic kernels prove that the proposed synthesis techniques lead to significant power savings.