Abstract
This chapter focuses on run-time power management, which is one of the most efficient low-power strategies, applicable at various levels of abstraction of the unified meta flow. Two run-time power management techniques applicable for the design of low and medium bit-rate digital modems are introduced. Specifically, an event-driven power management methodology and a dynamic power management technique based on frequency scaling, are presented for custom processors. They are both situated at the operation/instruction concurrency level in the unified design flow of chapter 2. The main test-vehicle is a real-life design, namely a DECT receiver developed for the purposes of the LPGD project in the European Low Power Initiative. The experimental results prove that the application of the proposed techniques introduces significant power savings.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
M. Aldina, J. Monteiro, S. Devadas, A. Ghosh, M. Papaefthymiou, “Precomputation-Based Sequential Logic Optimization for Low Power”, IEEE Transactions on Very Large Scale Integration Systems, vol. 2, no. 4, pp. 426–436, 1994.
L. Benini, P. Siegel, G. De Micheli, “Automatic Synthesis of Gated Clocks for Power Reduction in Sequential Circuits”, IEEE Design and Test of Computers, vol. 11, no. 4, pp. 32–40,1994.
L. Benini, G. De Micheli, “Transformation and Synthesis of FSMs for Low Power Gated Clock Implementation”, IEEE Transaction on Computer Aided Design, vol. 15, no. 6, pp. 630–643,1996.
L. Benini, G. De Micheli, DYNAMIC POWER MANAGEMENT: Design Techniques and CAD tools, Kluwer Academic Publishers, 1998.
L. Benini and G. De Micheli, “System-Level Power Optimization: Techniques and Tools”, in proc. ACM/IEEE International Symposium on Low Power Electronics & Design, pp. 288–293, Aug. 1999.
L. Benini, A. Bogliolo, G. Paleologo and G. De Micheli, “Policy Optimization for Dynamic Power Management”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 6, pp. 813–833, June 1999.
S.S. Bhattacharyya, and A. E. Lee, “Memory management for data flow programming of multirate signal processing algorithms”, IEEE Transactions on Signal Processing, vol. 42, pp. 1190–1201, May 1994.
ETS 300 175: “Radio Equipment and Systems (RES); Digital European Cordless Telecommunications (DECT); Common Interface (CI)”.
T. C. Denk and K. K. Parhi, “Synthesis of Folded Pipelined Architectures for Multirate DSP Algorithms”, IEEE Transactions on Very Large Scale Integration Systems, Vol. 6, No. 4, pp. 595–607, Dec. 1998.
J. D. Gibson, The communications handbook, CRC Press and IEEE Press, 1997.
GSM 05.05 (ETS 300 577) “European digital cellular telecommunications system (Phase 2); Radio transmission and reception”.
C.-H Hwang, A. C.-H Wu, “A Predictive System Shutdown Method for Energy Savings of Event Driven Computation”, in proc. IEEE/ACM International Conference on Computer Aided Design, pp. 28–32, San Jose, CA, Nov. 1997.
E. Kusse and J. Rabaey, “Low-energy embedded FPGA structures”, in proc. ACM/IEEE International Symposium on Low Power Design, pp. 155–160, San Diego, CA, Aug. 1998.
P. Landman, “Low power architectural design methodologies”, Ph.D. Dissertation, U.C. Berkeley, Aug. 1994.
D. Lidsky and J. Rabaey, “Early exploration — A World Wide Web application”, m proc. ACM/IEEE Design Automation Conference, pp. 27–32, June 1996.
E. Macii, M. Pedram, F. Somenzi, “High-Level Power Modeling, Estimation, and Optimization”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 17, No. 11, pp. 1061–1079, Nov. 1998.
E. Metaxakis, A. Tzimas and G. Kalivas, “A low complexity baseband receiver for direct conversion DECT-based portable communications”, in proc. IEEE International Conference on Universal Personal Communications, pp. 45–49, Florence, Italy, 1998.
L. Molisch, B. Lopez, M. Paier, J. Fühl, E. Bonek, “Error Floor of Unequalized Wireless Personal Communications Systems with MSK Modulation and Training-Sequence-Based Adaptive Sampling”, IEEE Transactions on Communications, Vol 45 No. 5, pp 554–562, May 1997.
K. Murota, K. Hirade, “GMSK Modulation for Digital Mobile Radio Telephony”, IEEE Transactions on Communications, Vol. Com 29, No 7, pp. 1044–1050, July, 1981.
M. Perakis, D. Soudris, C. Goutis and A. Thanailakis, “Low-Power Architecture Design of GSM/DECT Algorithms”, deliverable report LPGD\WP2\DUTH\D3.3Rl,Nov. 1998.
M. Perakis, et al “The VLSI Implementation of a Baseband Receiver For DECT-Based Portable Applications”, in proc. IEEE International Symposium on Circuits and Systems, Vol. I, pp. 198–201, Orlando, Florida, USA, 1999,.
J. G. Proakis, Digital Communications, 3 rd edition, McGraw-Hill, New York, NY 1995.
Q. Quiu and M. Pêdram, “Dynamic Power Management Based on Continuous-Time Markov Decision Processes”, in proc. ACM/IEEE Design Automation Conference, pp. 555–561, June 1999.
S. Ramanathan, V Visvanathan, S. K. Nandy, “A computational engine for mul-tirate FIR digital filtering”, Signal Processing, Elsevier Science, Vol. 79, Issue 2, pp. 213–222, Dec. 1999.
D. Soudris et al, “A Low-Power Design of a DCS1800-GSM/DECT Modulator/Demodulator”, to be published in proc. IEEE International Symposium on Circuits and Systems, Geneva, Switzerland, May 2000.
M. B. Srivastava, A. P. Chandrakasan, R. W. Brodersen, “Predictive System Shutdown and other Architectural Techniques for Energy Efficient Programmable Computation”, IEEE Transactions on Very Large Scale Integration Systems, Vol. 4, No. 1, pp. 42–55, March 1996.
V. Tiwari, S. Malik, P. Ashar, “Guarded Evaluation: Pushing Power Management in Logic Synthesis/Design”, in proc. ACM/IEEE International Symposium on Low Power Design, pp. 221–226, Dana-Point, CA, April 1995.
P. P. Vaidyanathan, Multirate Systems and Filter Banks, Englewood Cliffs, NJ: Prentice Hall, 1993.
N. D. Zervas, D. Soudris, C. E. Goutis and A. Thanailakis, “Low Power Methodology for Transformations of Wireless Communication Algorithms”, deliverable report LPGD\WP2\DUTH\D2.2R1, Jan. 1999.
N. D. Zervas, D. Soudris, S. Theoharis, C. E. Goutis and A. Thanailakis, “A Methodology for the Behavioral-Level Event-Driven Power Management of Digital Receivers”, to be published mproc. IEEE International Symposium on Circuits and Systems, Geneva, Switzerland, May 2000.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 Springer Science+Business Media Dordrecht
About this chapter
Cite this chapter
Zervas, N.D., Theoharis, S., Perakis, M., Goutis, C.E., Soudris, D. (2000). Run-Time Power Management for Low and Medium Bit-Rate Digital Receivers. In: Catthoor, F. (eds) Unified low-power design flow for data-dominated multi-media and telecom applications. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-3182-8_6
Download citation
DOI: https://doi.org/10.1007/978-1-4757-3182-8_6
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5000-0
Online ISBN: 978-1-4757-3182-8
eBook Packages: Springer Book Archive