Abstract
This chapter deals with the handling of interrupts in pipelined machines and with recovery in the event of branch mispredictions. The first section is a discussion of basic implementation techniques, the second consists of a number of case studies, and the third is a summary.
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© 1999 Springer Science+Business Media New York
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Omondi, A.R. (1999). Interrupts and Branch Mispredictions. In: The Microarchitecture of Pipelined and Superscalar Computers. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2989-4_7
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DOI: https://doi.org/10.1007/978-1-4757-2989-4_7
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