A design approach for 1V Switched Capacitor Δ∑ modulators is presented. The chosen method of implementation is the Switched Opamp Technique, which is shortly revisited. Dedicated low voltage circuit blocks including a class AB OTA and comparater are treated. A rearranged Δ∑ modulator topology with half delay integrators is discussed. The influence of very low supply voltage on power consumption is illustrated. Measurement results of a 900m V Δ∑ modulator with 77dB Dynamic Range are discussed.
KeywordsCurrent Mirror Input Stage Modulator Topology Switch Capacitor Supply Node
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