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SOI-Technology ST-SPICE

  • James B. Kuo
  • Ker-Wei Su
Chapter

Abstract

As described in the previous chapters, SOI CMOS technology has been regarded as another major VLSI technology in addition to bulk CMOS technology. VLSI circuits using SOI CMOS technology have been reported increasingly. Since the performance of SOI CMOS devices is quite different from that of the bulk ones, SOI VLSI circuits have demonstrated unique phenomena as described in Chapter 3. When designing SOI VLSI circuits, the SPICE CAD program designed for bulk CMOS devices may not be sufficient for circuit simulation. In this chapter, by including the analytical device models of deep-submicron fully-depleted SOI CMOS devices described in the last two chapters, SOI-Technology— ST-SPICE1 suitable for CAD of SOI CMOS VLSI circuits is described. Starting from the basic concepts of the SPICE program, analytical device models of deep-submicron fully-depleted SOI CMOS devices used in ST-SPICE for CAD of VLSI circuits are explained. In the final portion of this section, usage of the ST-SPICE CAD program for analyzing the steady state and transient behaviors of SOI CMOS circuits is presented.

Keywords

Threshold Voltage Drain Current Gate Oxide VLSI Circuit CMOS Inverter 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • James B. Kuo
    • 1
  • Ker-Wei Su
    • 1
  1. 1.National Taiwan UniversityTaiwan

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