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SOI CMOS Devices—Basic

  • James B. Kuo
  • Ker-Wei Su
Chapter

Abstract

In the previous chapters, processing technology and properties of SOI CMOS devices and VLSI circuits using SOI CMOS devices are introduced. Compared to bulk CMOS devices, SOI CMOS devices have been reknown for their superior performance in smaller second order effects, no latchup, and higher speed. Due to their unique structure, SOI CMOS devices have performance quite different from the bulk ones. In this chapter, fundamental behaviors of SOI CMOS devices are described. Starting from the back gate bias effect, one-dimensional threshold voltage models of SOI CMOS devices are presented. Then, short and narrow channel effects of SOI CMOS devices are described. Considering both short and narrow channel effects, three-dimensional small-geometry effects on the threshold voltage are depicted. After considering the threshold voltage, the mobility model of an SOI CMOS device is analyzed. Carrier mobilities in SOI CMOS devices are complicated especially for small-geometry SOI CMOS devices. In a short-channel SOI CMOS device, the internal electric field may be high. As a result, carriers in the channel may be traveling with a large energy. Therefore, carrier temperature may be much higher than the lattice temperature. Hence, the carrier temperature effect on the mobility can not be neglected. Sometimes, carriers may be travelling at a velocity even higher than the saturated velocity—velocity overshoot.

Keywords

Threshold Voltage Lattice Temperature Drain Voltage Short Channel Effect Threshold Voltage Shift 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media Dordrecht 1998

Authors and Affiliations

  • James B. Kuo
    • 1
  • Ker-Wei Su
    • 1
  1. 1.National Taiwan UniversityTaiwan

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