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Co-Design at Work: the Ethernet Bridge Case Study

  • L. Sánchez
  • M. L. López
  • N. Martínez
  • C. Carreras
  • J. C. López
  • C. Delgado-Kloos
  • A. Royo
  • P. T. Breuer
Part of the Current Issues in Electronic Modeling book series (CIEM, volume 8)

Abstract

The aim of this document is to present a hardware-software co-design methodology, working through a case study of an Ethernet bridge. This co-design process starts with a system level specification based on the LOTOS formal description technique. The hardware-software partitioning approach is characterized by coarse granularity, a clustering algorithm and a cost function based on estimates at different abstraction levels. Validation accompanies each design stage.

Keywords

Medium Access Control Destination Address Target Architecture Software Part Hardware Part 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [1]
    S. Antoniazzi, A. Balboni, W. Fornaciari, and D. Sciuto. The Role of VHDL within the TOSCA Co-design Framework. In Euro-VHDL ’94, Grenoble, France, September 1994.Google Scholar
  2. [2]
    E. Barros, W. Rosenstiel, and X. Xiong. HW/SW Partitioning with UNITY. In 2nd International Workshop on Hardware-Software Co-Design, 1993.Google Scholar
  3. [3]
    T. Bolognesi and E. Brinksma. Introduction to the ISO Specification Language LOTOS. In Computer Networks and ISDN Systems 14, pages 25–59, 1987.Google Scholar
  4. [4]
    S. O. Bradner. Ethernet Bridges and Routers. Data Communications, pages 58–69, February 1992.Google Scholar
  5. [5]
    C. Carreras et al. A Co-Design Methodology Based on Formal Specification and High-level Estimation. In 4th International Workshop on Hardware/Software Codesign, March 1996.Google Scholar
  6. [6]
    C. Delgado Kloos, A. Marin López, T. de Miguel Moro, and T. Robles Valladares. From LOTOS to VHDL. Current Issues in Electronic Modelling, (3), September 1995.Google Scholar
  7. [7]
    R. Gupta, Jr. C. N. Coelho, and G. de Micheli. Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. In Proc. 29th DAC, pages 225–230, 1992.Google Scholar
  8. [8]
    J. Henkel, R. Ernst, U. Holtmann, and T. Benner. Adaptation of Partitioning and High-Level Synthesis in Hardware/Software Co-Synthesis. In Proc. ICCAD′94, 1994.Google Scholar
  9. [9]
    C. A. R. Hoare. Communicating Sequential Processes. Prentice Hall Int, 1985.MATHGoogle Scholar
  10. [10]
    IEEE, editor. IEEE 802.1 D Media Access Control Bridge Standard. 1990.Google Scholar
  11. [11]
    T. B. Ismail, M. Abid, and A. Jerraya. COSMOS: A Codesign approach for communicating systems. In 3rd International Workshop on Hardware/Software Codesign. Codes/CASHE ′94, September 1994.Google Scholar
  12. [12]
    ISO. Information Processing Systems Open Systems Interconnection LOTOS: A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour. IS-8807. International Standards Organization, 1989. published 15 Feb 1989.Google Scholar
  13. [13]
    S. C. Johnson. Hierarchical Clustering Schemes. Psychometrika, pages 241–254, September 1967.Google Scholar
  14. [14]
    A. Kalavade and E. A. Lee. A Global Critically/Local Phase Driven Algorithm for the Constrained Hardware/Software Partitioning Problem. In 3rd International Workshop on Hardware/Software Codesign. Codes/CASHE ′94, September 1994.Google Scholar
  15. [15]
    M. L. López Vallejo et al. Coarse Grain Partitioning for Hardware-Software Co-design. In 22nd Euromicro Conference, EUROMICRO′96, Prague, 2–5 September, 1996.Google Scholar
  16. [16]
    J. A. Manas and T. de Miguel. From LOTOS to C. In Ken J. Turner, editor, Formal Description Techniques, I, pages 79–84, Stirling, Scotland, UK, 1989. IFIP, North-Holland. Proceedings FORTE′88, 6–9 September, 1988.Google Scholar
  17. [17]
    J. A. Manas and J. Salvachúa. The Sieve of Eratosthenes. An Evaluation of Compilation Performance. Technical report of the LOTOSPHERE project, Dpto. Ingeniería de Sistemas Telemáticos, ETSIT, UPM, Madrid, Spain, 1990.Google Scholar
  18. [18]
    C. Miguel, A. Fernández, J. M. Ortuno, and L. Vidaller. A LOTOS based Performance Evaluation Tool. Special Issue of “Computer Networks and ISDN Systems” in: TOOLS FOR FDTs, 25(7):791–813, February 1993.Google Scholar
  19. [19]
    R. Milner. A Calculus of Communicating Systems. Lecture Notes in Computer Science 92. Springer-Verlag, New York, NY (USA), 1980.CrossRefGoogle Scholar
  20. [20]
    Juan Quemada, Santiago Pavón, and Angel Fernández. State Exploration by Transformation with LOLA. In Workshop on Automatic Veri ication Methods for Finite State Systems, Grenoble, June 1989.Google Scholar
  21. [21]
    L. Sánchez Fernández, N. Martínez Madrid, and C. Delgado Kloos. Integrating Non-Functional Aspects into LOTOS. Current Issues in Electronic Modelling, (4), December 1995.Google Scholar
  22. [22]
    J. M. Spivey. Understanding Z. Cambridge University Press, 1988.Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 1997

Authors and Affiliations

  • L. Sánchez
    • 1
  • M. L. López
    • 2
  • N. Martínez
    • 3
  • C. Carreras
    • 2
  • J. C. López
    • 2
  • C. Delgado-Kloos
    • 3
  • A. Royo
    • 2
  • P. T. Breuer
    • 1
  1. 1.Dep. Ingeniería de Sistemas Telemáticos, Esc. Téc. Sup. Ingenieros de TelecomunicaciónUniversidad Politécnica de MadridMadridSpain
  2. 2.Dep. Ingeniería Electrónica, Esc. Téc. Sup. Ingenieros de TelecomunicaciónUniversidad Politécnica de MadridMadridSpain
  3. 3.Dep. IngenieríaUniversidad Carlos III de MadridLeganésSpain

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