Design Verification and Testbench

  • Ben Cohen


Design verification is the process of insuring design correctness. Verification typically encompasses three classes of disciplines:
  1. 1.

    Functional verification during the architectural/RTL design.

  2. 2.

    Regression tests for modified designs as a result of synthesis, design optimization, post-layout, etc.

  3. 3.

    Formal verification during design validation, synthesis, or optimization.



Test Vector Formal Verification Direct Memory Access Linear Feedback Shift Register Random Delay 


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Copyright information

© Springer Science+Business Media New York 1997

Authors and Affiliations

  • Ben Cohen

There are no affiliations available

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