Switch Level Modeling

  • Donald E. Thomas
  • Philip R. Moorby


Designs at the logic level of abstraction, describe a digital circuit in terms of primitive logic functions such as OR, and NOR, etc., and allow for the nets interconnecting the logic functions to carry 0, 1, x and z values. At the analog-transistor level of modeling, we use an electronic model of the circuit elements and allow for analog values of voltages or currents to represent logic values on the interconnections.


Full Strength NAND Gate Phase1 Clock Pull Strength Strong Drive 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Copyright information

© Springer Science+Business Media New York 1996

Authors and Affiliations

  • Donald E. Thomas
    • 1
  • Philip R. Moorby
    • 2
  1. 1.Carnegie Mellon UniversityUSA
  2. 2.Avid Technology, Inc.USA

Personalised recommendations