Constraining and Optimizing Designs — I

Abstract

This chapter is the first of two chapters that outlines the details of synthesis methodologies. After a design has been described in HDL and functionally simulated, the next step involves logic synthesis using DC. Herein lies the core of the synthesis process. How can one get the best results from the synthesis tool? What is the methodology to be followed in optimizing a design? Is synthesis a push-button solution?