This chapter considers the problem of minimizing signal delay for performance-driven system design. The signal delay objective moves us from the unoriented pointset P of the Steiner problem to an oriented signal net S which has an identified source. Optimal-delay wiring geometries can differ substantially from those of optimal-area (Steiner minimal tree) solutions, particularly as technology moves into submicron regimes and layout dimensions continue to increase. Our discussion reflects the history of our recent research, which has addressed four major issues.
KeywordsSpan Tree Minimum Span Tree Steiner Tree Steiner Point Short Path Tree
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