Abstract
High speed 1-bit quantizer sigma delta (ΣΔ-) modulator topologies and some of their applications are discussed. It is shown that a 14-bit dynamic range can be achieved with the oversampling ratio of 16 by using cascaded high-order 1-bit ΣΔ-modulators whose noise transfer function can be modified by placing some of the zeros in the baseband. Compared to cascaded low-order ΣΔ-modulator structures, these modulators are less sensitive to circuit imperfections. The moderate requirements allow us to use simplified high speed circuit structures. The operational transconductance amplifier (OTA) structure realization based on the use of a minimum number of active transistors in the signal path is discussed. Also an example of ΣΔ-modulation in digital data transmission at the intermediate frequency is shown. This arrangement has some advantages over conventional systems including the fast recovery from the power-down mode, which is a crucial problem in the portable digital telecommunication applications.
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References
J.C. Candy, and G.C. Ternes, et al., Oversampling Delta-Sigma Data Converters, IEEE Press, New York 1992.
T. Ritoniemi, T. Karema and H. Tenhunen, “A Fifth Order Sigma-Delta Modulator for Audio AID-Converter”, in Proc. IEE 1991 International Conference on Analogue to Digital and Digital to Analogue Conversion, Swansea, UK, September 1991, pp. 153–158.
B. Brandt, and B. Wooley, “A CMOS Oversampling A/D Converter with 12b Resolution at Conversion Rates Above 1 MHz” in Proc. IEEE International Solid-State Circuits Conference, February 1991, pp. 64–65.
S. Ingalsuo, T. Ritoniemi, T. Karema, and H. Tenhunen, “A 50 MHz Cascaded Sigma-Delta A/D Modulator”, to be included in Proc. IEEE Custom Integrated Circuits Conference,May 1992.
F. Op ‘t Eynde, G. Ming, and W. Sansen, “A CMOS Fourth Order 14b 500 k-Sample/s Sigma-Delta ADC Converter” in Proc. IEEE International Solid-State Circuits Conference, February 1991, pp. 62–63.
W.L. Lee and C.G. Sodini, “A topology for higher order interpolative coders”, in Proc. IEEE International Symposium on Circuits and Systems, May 1987, pp. 459–462.
D. Welland, B. Signore, E. Swanson, T. Tanaka, K. Hamashita, S. Hara, and K. Takasuka, “A Stereo 16-bit Delta Sigma A/D Converter for Digital Audio”, J. Audio Eng. Soc., Vol. 37, June 1989, pp. 467–486.
P. Ferguson, A. Ganesan, R. Adams, S. Vincelette, R. Libert, A. Volbe, D. Andears, A. Charpertier, and J. Dattoro, “An 18b 20kHz Dual Sigma Delta A/D Converter”, in Proc. IEEE Solid-State Circuits Conference, February 1991, pp. 68–69.
T. Ritoniemi, T. Karema and H. Tenhunen, “The Design of Stable High Order 1-Bit Sigma-Delta Modulators”, in Proc. IEEE International Symposium on Circuits and Systems, May 1990, pp. 3267–3270.
Y. Matsya, K. Uchimura, A. Iwata, T. Kobayashi, M. Ishikawa, and T. Yoshitome, “A 16-bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping,” IEEE J. Solid-State Circuits, Vol. SC-22, December 1987, pp. 921–929.
M. Rebeschini, N. Bavel, P. Rakers, R. Greene, J. Caldwell and J. Haug, “A High-Resolution CMOS Sigma-Delta A/D Converter with 320 kHz Output Rate”, in Proc. IEEE Int. Symp. on Circuits and Systems, May 1989, pp. 246–249.
T. Karema, T. Ritoniemi and H. Tenhunen, “Fourth Order Sigma-Delta Modulator for Digital Audio and ISDN applications”, in Proc. IEE European Conference on Circuit Theory and Design, September 1989, pp. 223–227.
S. Ingalsuo, T. Ritoniemi, and H. Tenhunen, “New Differential Amplifier for High Speed SC-Circuits”, in Proc. IEE European Conference on Circuit Theory and Design, September 1991, pp. 1349–1358.
Y. Tsividis, and P. Antogetti, et al., Design of MOS VLSI for Telecommunications, Prentice-Hall, New Jersey, 1985, pp. 145–169.
S. Masuda, Y. Kitamura, S. Ohya, and M. Kikuchi, “CMOS- Sampled Differential Push-Pull Cascode Operational Amplifier” in Proc. IEEE International Symposium on Circuits and Systems, May 1984, pp. 1211–1214.
A. Baschirotto, R. Alini, and R. Castello, “Bicmos Operational Amplifier with Precise and Stable DC Gain for High-Frequency Switched Capacitor Circuits”, IEE Electronics Letters, Vol. 27, July 1991, pp. 1338–1340.
D. Haigh, and B. Singh, “A Switching Scheme for Switch Capacitor Filters which Reduces the Effect of Parasitic Capacitances Associated with Switch Control Terminals,” in Proc. IEEE International Symposium on Circuits and Systems, Los Angeles, USA, May 1983, pp. 586–589.
V. Eerola, H. Lampinen, T. Ritoniemi and H. Tenhunen, “Direct Conversion Using low pass Sigma-Delta modulation”, to be included in Proc. IEEE International Symposium on Circuits and Systems, May 1992.
R. Screier, and M. Snelgrove, “Bandbass Sigma-Delta Modulation”, IEE Electronics Letters, Vol. 25, 1989, pp. 1560–1561.
A. Jerry, “The Chignon Sampling Theorem–Its Various Extensions and Applications,” Proc. IEEE, Vol. 65, November 1977, pp. 1565–1596.
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© 1993 Springer Science+Business Media Dordrecht
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Ritoniemi, T. (1993). High Speed 1-bit Sigma Delta Modulators. In: Huijsing, J.H., van der Plassche, R.J., Sansen, W. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2233-8_10
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DOI: https://doi.org/10.1007/978-1-4757-2233-8_10
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