Via Minimization and Over-the-Cell Routing
After a chip is completely routed, the layout is functionally complete and can be sent for fabrication. However, the layout is usually improved to reduce the possibility of fabrication errors, reduce the total chip area and therefore, improve performance. In this chapter, we will discuss two methods of improving detailed routing: via minimization and over-the-cell routing.
KeywordsChannel Height Cluster Graph Channel Density Circle Graph Permutation Graph
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