Abstract
This chapter describes the transformations that are performed at the behavioral level in Hercules. Behavioral transformations identify the inherent interoperation parallelism in the behavior. Understanding the parallelism can give an indication of the fastest design synthesis can produce, assuming in the final implementation each operation is implemented by a dedicated hardware component. While this assumption may not be realistic due to area and interconnection limits, computing the performance under this assumption is important as a bound on the given behavior.
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© 1992 Springer Science+Business Media New York
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Ku, D.C., De Micheli, G. (1992). Behavioral Transformations. In: High Level Synthesis of ASICs under Timing and Synchronization Constraints. The Springer International Series in Engineering and Computer Science, vol 177. Springer, Boston, MA. https://doi.org/10.1007/978-1-4757-2117-1_3
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DOI: https://doi.org/10.1007/978-1-4757-2117-1_3
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-5129-8
Online ISBN: 978-1-4757-2117-1
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