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Process Reliability

  • R. Lahri
  • S. P. Joshi
  • B. Bastani
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 76)

Abstract

The reliability of BiCMOS process is a key issue in establishing its viability. Some concerns have been raised regarding the increased process complexity and the compatibility of fabricating CMOS and bipolar devices on the same chip. Performance and process tradeoffs are expected as these two device types are merged with minimal additional process steps. Therefore, it is imperative that device reliability issues are integrated with the process architecture and device design issues.

Keywords

Gate Oxide Soft Error SRAM Cell IEDM Tech Bipolar Device 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media New York 1990

Authors and Affiliations

  • R. Lahri
    • 1
  • S. P. Joshi
    • 1
  • B. Bastani
    • 1
  1. 1.National Semiconductor CorporationUSA

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