A beam former implementation is described which combines the computational efficiency of a Fast Fourier Transform algorithm with the speed and economy of analog signal processing hardware. The fast transform algorithm enables a single processor module to provide 32 simultaneous beams when used with a line array of 32 equidistantly-spaced transducers. The signal processing required to implement this function is the equivalent of performing, in real-time, a 32 point Fast Fourier Transform on 32 continuous 100 kilohertz input signals, 100 kilohertz being the isonifier frequency. The fast analog transform technique allows this amount of processing to be performed on a single circuit board, whereas a digital implementation would require a great number of high speed calculations. The operational amplifier circuit configurations which perform the multiplications and summations, and the algorithm characteristics which facilitate analog implementation, are described. The use of multiple Fast Beamforming Processor modules for the real-time generation of two-dimensional ime.és is also discussed.
KeywordsFast Fourier Transform Algorithm Signal Flow Graph Line Array Transducer Output Analog Circuitry
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