# The VLSI Circuit Model

Chapter

## Abstract

The last chapter presenter a high-level bounding strategy for digital MOS circuits that assumed the circuit that assumed the circuit mdel being analyzed had a number df special properties. A general class of networks that exhibits these properties is deriver here. Restrictions are placed on the model that insure both the existence of sufficient monotonic relationships and the ability to partition analysis, but do not significantly restrict the model’s generality

## Keywords

Internal Node Node Equation Terminal Voltage Node Voltage Internal Element## Preview

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## References

- 21.The function can be left undefined in regions in which the diodes between the substrate and the source and drain terminals are not reversed biased. This restriction can then be carried through the following defiinitions and theorems. For simplicity, it is assumed here that the model is extrapolated into this region and external diodes can model injection of current into the substrate.Google Scholar
- 22.Models that assume constant drain current as a function of v
_{DS}in saturation are not strictly monotonic as assumed here, but they can be made to be so with an arbitrarily small change. Strict monotonicity is required only to insure the existence of a unique solution when two transistor models are placed in series.Google Scholar - 23.Also presented later is a fourth partial ordering that is analogous to the charge-wise ordering but applies to incremental analysis. A generalization of incremental analysis must be made before the fourth ordering can be defined.Google Scholar
- 24.Recently proposed nonreciprocal multi-port capacitor models [40] cannot be constructed from two-terminal capacitor elements.Google Scholar
- 25.A subnetwork need not have elements connected to each of its n terminals, i.e., some of its terminals might not be connected to any internal elements.Google Scholar
- 26.Instead of being ignored, this capacitance might also be grouped with others and placed at only one node out of the group.Google Scholar
- 27.This restriction does not rule out arbitrary one-port resistor groups if the resistors are linear.Google Scholar
- 28.Recall that current sources are not used in the circuit model so there is no corresponding problem when using terminal currents as dependent variables.Google Scholar
- 29.Both a monotonically increasing function and a monotonically decreasing function, as defined here, include constant functions. Strict monotonicity is used to imply strict inequalities.Google Scholar
- 30.Uniqueness requires strict incremental passivity as supplied by definition 4–1. Existence requires that for each resistor, i→∞ as v→∞, which is implied by the definition.Google Scholar
- 31.If the function f(v) is assumed to be C
^{1}, monotonicity can be shown by observing that [J(f)]_{(v)}is an M-matrix [43]. Even more structure of N_{R}becomes apparent through the known properties of M-matrices [44], and this structure has been useful in bounding the behavior of RC circuits [30] [33] [34] [45].Google Scholar - 32.If the property of monotonicity with unknown polarity were true in general, a bound could be obtained by comparing the currents produced by all possible combinations of extreme resistor values. Such a search method is considered in detail for the capacitor subnetwork N.Google Scholar
- 33.Current-wise monotonicity may seem like a strange notion, but it is merely a notational convenience. If the simple partial ordering of resistors were used, the sign of the monotonic relationships would depend on terminal voltages.Google Scholar
- 34.A small capacitor allows the solution of what is essentially a d.c. problem to be obtained with the more powerful relaxation techniques considered later for transient analysis.Google Scholar
- 35.With a little modification, the diode i-v curves can be made to satisfy the R-element defiinition, and the operation of the circuit will be essentially unchanged.Google Scholar
- 36.A linear resistor is a special case of the transistor as defiined here, but generalizing constraints to specially treat such a case is of little practical value.Google Scholar
- 37.Lipschitz continuity of a series-parallel group does not follow from Lipschitz continuity of each internal element without further reasonable restrictions on the transistor model. Rather than add such restrictions, Lipschitz continuity is simply required for each series-parallel group.Google Scholar
- 3.Any transistor connected in a “diode” confiiguration satisfies the defiinition of a general N-element as a consequence of the constraints in definition 4–3.Google Scholar
- 39.Note that as long as diode configurations are allowed, this constraint only affects model complexity. The exception is needed, though, as one-port groups cannot be reduced beyond a single transistor.Google Scholar
- 40.It is easy to show that the polarity of each transistor within a one-port group is always the same as that of the entire group.Google Scholar
- 41.The only purpose of this circuit transformation is to simplify analysis. As with other transformations mentioned here, it does not imply that transistors must actually be duplicated in the database of a simulation program.Google Scholar
- 42.This would also be true for N
_{R}if its one-port groups were required to be series-parallel.Google Scholar - 43.It is also possible to consider a mix of charges and voltages, but that possibility is not explored here.Google Scholar
- 44.Equations (4.1) and (4.2) can be solved for each state derivative component as a function only of the state, producing a set of equations said to be in “normal” form. In general, each component of the derivative is a function of each state component in normal form so the equations are no longer local. By maintaining the form of equations (4.1) and (4.2), each component can be solved for its corresponding state derivative component with only information from nodes directly connected through circuit elements.Google Scholar
- 45.The Gauss-Jacobi form of relaxation is used here as a simplifiication, but similar results hold for the Gauss-Seidel form as well, with only slight modifications of the arguments.Google Scholar
- 46.The well-defined nature of this mapping can be easily shown when only one terminal voltage is unknown in each calculation, as there must be a capacitor connected to each node with the property that q→∞ when v→∞. Theorem 4–7 can then be stated first in terms of partitions containing only one node and combined with the contraction mapping theorem [50] to show a unique solution exists for larger partitions even with direct capacitive coupling between the nodes in the partition. An alternative approach is presented in theorem 4–8.Google Scholar
- 47.Starting with each capacitor at its actual value and moving each to its proper extreme one at a time produces a valid bound corresponding to one set of extremes. This argument shows that one extreme is a bound, but since the actual values are not known during computation, it does not produce a procedure for finding it.Google Scholar
- 48.If the less general form i=c(v)v were used exclusively for incremental analysis, it would be impossible for two capacitors to be current-wise ordered.Google Scholar
- 49.Lipschitz in x uniformly in t means that the Lipschitz constant can be chosen such that it is not a function of t.Google Scholar
- 50.The conditions imposed on the function f imply a unique solution for a given initial condition.Google Scholar
- 51.If feedback connections between a terminal of N
_{N}and the gate of a one-port group connected to it were allowed, they could also be incorporated with this simple technique.Google Scholar - 52.Recall that special notions of monotonicity were used in sections 4.2 through 4.4.Google Scholar
- 53.Strictly speaking, the devices must be continuous, but solutions using continuous devices can generally approach arbitrarily close to a solution obtained using only piecewise continuous devices.Google Scholar
- 54.Since this transformation can only be made for lumped element models, distributed capacitance cannot be considered without further results.Google Scholar
- 55.Recall that special notions of monotonicity were used in sections 4.2 through
**4.4.**Google Scholar - 56.This property can be verified by appealing to corollary 4–1L The actual solution can be compared to the solution obtained when all voltages are fixed at one extreme over the entire time interval.Google Scholar

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© Springer Science+Business Media New York 1986