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Hot-Carrier Degradation During Dynamic Stress

  • W. Weber
  • M. Brox
  • R. Bellens
  • P. Heremans
  • G. Groeseneken
  • A. v. Schwerin
  • H. E. Maes

Abstract

In Chapter 1, the degradation of MOS transistors under DC stress conditions was considered. In a real circuit, however, most of the devices are operated dynamically, on account of which the degradation under AC stress conditions has gained increased attention. The most important question in these studies is whether the AC degradation can or cannot be predicted based on a set of DC degradation measurements. When the prediction based on DC measurements stands true, the AC degradation can be studied as a quasistatic process. When, however, the extrapolation turns out to be invalid, physical insight should be obtained for the deviating behavior.

Keywords

Duty Cycle Gate Voltage Dynamic Stress Stress Time Interface Trap 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Van Nostrand Reinhold 1992

Authors and Affiliations

  • W. Weber
    • 1
  • M. Brox
    • 1
  • R. Bellens
    • 2
  • P. Heremans
    • 2
  • G. Groeseneken
    • 2
  • A. v. Schwerin
    • 2
  • H. E. Maes
    • 2
  1. 1.Corporate Research and DevelopmentSiemens AGMünchenGermany
  2. 2.IMEC vzwLeuvenBelgium

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