Clocking Optimization and Distribution in Digital Systems with Scheduled Skews

  • Hong-Yean Hsieh
  • Wentai Liu
  • Paul Franzon
  • Ralph CavinIII


System performance can be improved by employing scheduled skews at flip-flops. This optimization technique is called skewed-clock optimization and has been successfully used in memory designs to achieve high operating frequencies. There are two important issues in developing this optimization technique. The first is the selection of appropriate clock skews to improve system performance. The second is to reliably distribute skewed clocks in the presence of manufacturing and environmental variations. Without the careful selection of clocking times and control of unintentional clock skews, potential system performance might not be achieved. In this paper a theoretical framework is first presented for solving the problem of optimally scheduling skews. A novel selfcalibrating clock distribution scheme is then developed which can automatically track variations and minimize unintentional skews. Clocks with proper skews can be reliably delivered by such a scheme.


Clock Generator Quantization Error Clock Period Sequential Circuit Reference Clock 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Kluwer Academic Publishers 1997

Authors and Affiliations

  • Hong-Yean Hsieh
    • 1
  • Wentai Liu
    • 1
  • Paul Franzon
    • 1
  • Ralph CavinIII
    • 2
  1. 1.Department of Electrical and Computer EngineeringNorth Carolina State UniversityRaleighUSA
  2. 2.Semiconductor Research CenterResearch Triangle ParkUSA

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