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Die Stress Measurement Using Piezoresistive Stress Sensors

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Thermal Stress and Strain in Microelectronics Packaging

Abstract

The in-situ measurement of mechanical stress in microelectronics packages has become desirable in recent years as a result of evolving packaging technology. In the case of integrated circuit (IC) packages, stress can be produced either through the die attachment process or through encapsulation in a molding material. In the case of chip-on-board (COB) packaging, stress can be produced by the chip coating used to protect the IC against handling damage and chemical attack. As die sizes have increased, stresses from these sources have steadily grown in magnitude, resulting in such phenomena as die cracking or shear stress-induced breakage of the die passivation and metal conductors under the passivation. In order to quantitatively determine the stress magnitudes in a packaged IC it is desirable to have a test device that can simulate the actual IC chip as closely as possible.

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Authors
  1. James N. Sweet
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Editors and Affiliations

  1. Hewlett-Packard Company, Palo Alto, California, USA

    John H. Lau PhD, PE

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© 1993 Van Nostrand Reinhold

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Sweet, J.N. (1993). Die Stress Measurement Using Piezoresistive Stress Sensors. In: Lau, J.H. (eds) Thermal Stress and Strain in Microelectronics Packaging. Springer, Boston, MA. https://doi.org/10.1007/978-1-4684-7767-2_7

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  • DOI: https://doi.org/10.1007/978-1-4684-7767-2_7

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4684-7769-6

  • Online ISBN: 978-1-4684-7767-2

  • eBook Packages: Springer Book Archive

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