A CAD Program for VLSI Placement and Routing

  • J. Y. Lee
  • J. M. Jou
  • H. T. Nian
  • C. Y. Chang
  • H. C. Wu


In this paper, a set of algorithms for circuit layout is developed. Algorithms for automatic/interactive placement of standard cell blocks in parallel rows use the concept of blending and repartition. The grouping and linear placement techniques are also used. Constructive-initial placement is interlaced with iterative-improved placement for better results.

Routing is divided into two subproblems; global (loose) routing and channel (detailed) routing. Global routing is used to find a layout topology for the interconnection nets. Graph theory is used to model the layout. Channel routing is used to interconnect nets or subnets within a channel using some novel and constructive methods. Algorithms for both global and channel routing are proposed.


Placement Problem Minimum Steiner Tree Logic Diagram Circuit Layout Forward Pointer 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Plenum Press, New York 1985

Authors and Affiliations

  • J. Y. Lee
    • 1
  • J. M. Jou
    • 1
  • H. T. Nian
    • 1
  • C. Y. Chang
    • 1
  • H. C. Wu
    • 1
  1. 1.Institute of Electrical and Computer EngineeringNational Cheng Kung UniversityTainanTaiwan, R.O.C.

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