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Supercomputing with Novel Architectures

  • R. G. Evans
  • S. Wilson

Abstract

The increase in speed of electronic computing machines in the period 1950–90 was attributable to improvements in electronic engineering and to the use of parallel computation. Until the early seventies the parallel computation was to a large extent transparent to the computer user. Since that time, however, this has ceased to be the case and the user has found it necessary to familiarize himself with some of the details of the machine architecture in order to exploit the capabilities of the particular target machine effectively. “Conventional” architectures are typified by the CRAY range of machines, which have a small number of very powerful vector processors sharing a common memory. On the other hand, “novel” architectures usually have a large number of less powerful processors together with a distributed memory.

Keywords

Processing Element Memory Unit Switch Unit Float Point Operation Multiple Data Stream 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. Flynn, M.J., 1972, I.E.E.E. Trans. Comput. C 21 948.CrossRefGoogle Scholar
  2. Hack, J.J., 1989, Parallel Computing 10 261CrossRefGoogle Scholar
  3. Hockney, R.W., 1988, Parallel Computing 2 119CrossRefGoogle Scholar
  4. Hockney, R.W., Jesshope, C.J., 1981, Parallel Computers, Adam Hilger, Bristol.Google Scholar

Copyright information

© Plenum Press, New York 1990

Authors and Affiliations

  • R. G. Evans
    • 1
  • S. Wilson
    • 1
  1. 1.Rutherford Appleton LaboratoryChilton, OxfordshireUK

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