Implementations of Load Balanced Active-Data Models of Parallel Computation
VLSI has encouraged the use of large scale parallelism in computer systems. This paper introduces an active-data model of parallelism applied to arbitrary data structures. An implementation of this model is described, and its limitations are sought. This implementation on the RPA computer system uses a fine-grain, SIMD-like, array-in-memory system, hosted by the INMOS transputer. Process or algorithmic parallelism can therefore be exploited at the top level of the system by replication of this basic unit. This synergism will be explored through the consideration of objects implementing the active-data model as a means of exploiting efficient and portable systems.
KeywordsLoad Balance Processing Element Queue Length Abstract Machine Virtual Processor
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