Abstract
This chapter presents a new approach towards support of rapid system virtual prototyping, melding current hardware and software development environments, called Virtual System Integration. This approach provides for the rapid execution of target software applications as they are simulated in a virtual system modeled in VHDL or Verilog. This approach to hardware/software co-verification also supports the respective development tools and debugging environments available today to hardware and software engineers. The Virtual Software Processor is introduced as a new form of simulation model.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Bunza, Geoffrey J. “A Journey Into Parallel Worlds: Exploring Hardware/Software Systems Integration”, Electronic Engineering Times, Feb. 5, 1996.
Rowson, James. “Hardware/Software Co-simulation ”, Proceedings of the Design Automation Conference, San Diego, CA, June 6-10, 1994.
Schnaider, Benny and Yogev, Einat. “Software Development in a Hardware Simulation Environment”, 33rd Design Automation Conference Proceedings, Las Vegas, NV, June 3-7, 1996.
Goering, Richard. “Prototypes Get Virtual”, Electronic Engineering Times, August 5, 1996.
Leef, Serge and Klein, Russell. “Hardware, Software Join in Simulation”, Electronic Engineering Times, June 3, 1996.
Bartholomew, John K. and Bunza, Geoffrey J. “Connecting Hardware and Software Design Environments: Realities in Bridging the Gap”, VIUF Conference Proceedings, Santa Clara, CA, Feb 28’ Mar 2, 1996.
Wilson, John. “A New Methodology for Co-Design: Virtual System Integration”. Electronic Engineering, Sept., 1995.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1997 Springer Science+Business Media Dordrecht
About this chapter
Cite this chapter
Bartholomew, J.K. (1997). Hardware/Software Co-Verification of Embedded System Designs using Virtual System Integration. In: Bergé, JM., Levia, O., Rouillard, J. (eds) Models in System Design. Current Issues in Electronic Modeling, vol 9. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-6295-5_4
Download citation
DOI: https://doi.org/10.1007/978-1-4615-6295-5_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-7890-7
Online ISBN: 978-1-4615-6295-5
eBook Packages: Springer Book Archive