Abstract
Although the aim of this book is to teach behavioral modeling in Verilog, the book would not be complete without mentioning user-defined primitives (UDPs). A UDP describes a piece of logic with a truth table. UDPs can be either combinatorial or sequential. As you may recall, the Verilog primitive set does not include any muxes, AND-OR-INVERT gates, or flip-flops. You can model all of these simple functions with UDPs.
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© 1997 Springer Science+Business Media New York
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Lee, J.M. (1997). User-Defined Primitives. In: Verilog® Quickstart. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-6113-2_7
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DOI: https://doi.org/10.1007/978-1-4615-6113-2_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-7801-3
Online ISBN: 978-1-4615-6113-2
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