Abstract
In this chapter we will look at some of the formal definitions of the Verilog language: identifiers, white space, comments, numbers, text macros, modules, value set, and strengths.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 1997 Springer Science+Business Media New York
About this chapter
Cite this chapter
Lee, J.M. (1997). Introduction to the Verilog Language. In: Verilog® Quickstart. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-6113-2_2
Download citation
DOI: https://doi.org/10.1007/978-1-4615-6113-2_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-7801-3
Online ISBN: 978-1-4615-6113-2
eBook Packages: Springer Book Archive