Abstract
Due to increasing use of portable systems, e.g., notebook computers, personal digital assistants (PDAs), and cellular phones, power is rapidly becoming as important a parameter as area and speed in the design of these systems [1]. At the system level, increasing complexity and higher density on boards result in previously unseen levels of power dissipation. At the IC level, larger die sizes and increasing device density along with higher clock frequencies lead to the undesirable effect of escalating power dissipation to levels that can no longer be ignored. In case of mobile CPUs, both the limitation of battery size as well as unavailability of special cooling mechanisms are two major constraints requiring power reduction. Desktops, on other hand, due to increased functionality, dissipate such levels of power that they need new thermal solutions. Hence, there is clearly a need for new technologies and system design techniques that would achieve ultra low power dissipation under performance and cost constraints.
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© 1997 Springer Science+Business Media Dordrecht
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Roy, K. (1997). Power Analysis and Design at System Level. In: Nebel, W., Mermet, J. (eds) Low Power Design in Deep Submicron Electronics. NATO ASI Series, vol 337. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-5685-5_14
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DOI: https://doi.org/10.1007/978-1-4615-5685-5_14
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