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ATM Switches with the Guaranteed-Rate Property

Chapter
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Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 537)

Abstract

In this chapter, ATM switches are considered. Generic “single-stage” ATM switch design goals will be outlined. Switch fabric designs are not explored; nonblocking crossbar fabrics will be implicitly assumed throughout this chapter. A focus of the chapter is to describe ATM switches that have a guaranteed-rate property and are feasible at high transmission speeds. The handling of best-effort flows is also considered with an eye toward IP data applications. More comprehensive overviews of packet switching are given in [142, 9, 110].

Keywords

Output Port Input Port Bandwidth Allotment Memory Block Output Link 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Notes

  1. 1.
    VOQ was originally proposed to eliminate head-of-line blocking in simple input-buffered switches [3, 109].Google Scholar
  2. 2.
    The term “hub” is sometimes used instead of “port” in this context.Google Scholar

Copyright information

© Springer Science+Business Media New York 2000

Authors and Affiliations

  1. 1.E&CE DeptUniversity of WaterlooWaterlooCanada

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