Quantum nanocircuits: chips of the future?

Abstract

Over the years, the lateral dimensions in microelectronic circuits have been shrinking systematically by a factor of two every six years. The extrapolation of the past, formulated in Moore’s law, serves as the prescription for the future as laid down in the National Technology Roadmap for Semiconductors [1]. This Roadmap indicates gate widths for CMOS transistors of 35 nm in the year 2012. Continuation would predict minimum feature sizes of 1 nm around 2040. Many times in the past, a breakdown of Moore’s law has been predicted due to limitations in fabrication, excessive power density, or discontinuous change of physical behavior. So far, the impetus of the collective microelectronics industry has pushed aside such obstacles with remarkable ease. Nevertheless, it is hard to imagine silicon CMOS technology on the true nanometer scale. Will new quantum nan-odevices take over? Many introductions to papers on quantum devices suggest that this will be the case. In this chapter, we attempt to analyze the long-term potential for microelectronics applications of quantum devices. Obviously, this analysis can only depart from the types of devices and from the physics effects that we know of today. We will limit ourselves to electronic transport devices. We focus strongly on devices that are based on manipulation of single electrons.