Abstract
The major difference between the model described in this chapter and the previous structured model in chapter 6 is that we cannot simultaneously optimize the selection of types of functional units without the introduction of nonlinear inequalities†. In other words the mapping of operations to types of functional units must be a one to one (or many to one) mapping.
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© 1992 Springer Science+Business Media New York
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Gebotys, C.H., Elmasry, M.I. (1992). Oasic: Area-Delay Constrained Architectural Synthesis. In: Optimal VLSI Architectural Synthesis. The Kluwer International Series in Engineering and Computer Science, vol 158. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-4018-2_7
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DOI: https://doi.org/10.1007/978-1-4615-4018-2_7
Publisher Name: Springer, Boston, MA
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