Abstract
State of the art high level synthesis approaches will be reviewed in this chapter. Each section will provide a definition of the problems and an introduction to the mathematics involved in solving these problems. We examine previous research as it relates to each problem including independent subtask optimizations, simultaneous approaches to synthesis, and mathematical models. In addition we will briefly discuss feasibility models, cost functions, high level partitioning tools and timing considerations in logic and architectural synthesis.
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© 1992 Springer Science+Business Media New York
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Gebotys, C.H., Elmasry, M.I. (1992). State of the Art Synthesis. In: Optimal VLSI Architectural Synthesis. The Kluwer International Series in Engineering and Computer Science, vol 158. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-4018-2_3
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DOI: https://doi.org/10.1007/978-1-4615-4018-2_3
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-6797-0
Online ISBN: 978-1-4615-4018-2
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