# Synthesis of Self-Timed Circuits

## Abstract

This chapter describes a synthesis procedure of designing digital systems that do not require the distribution of a clocking signal. Guarded commands [1] were chosen to provide a simple syntax for circuit specifications. The notation of signal transition graphs [2] was used to represent circuit behavior and to simplify algorithms and graph manipulations. The definition of semi-modularity [3] was modified and the theorems developed for marked directed graphs [4] were used to guarantee a hazard-free implementation. All together, a deterministic algorithm of synthesizing self-timed synchronization circuits from high-level specifications was constructed. The implication is that fully asynchronous design (or more precisely, asynchronous design using anisochronous interconnect according to the previous chapter) is feasible and self-timed circuit synthesis can be automated. Although in this chapter we are primarily concerned with the synthesis of non-metastable circuits, the procedure is also valid for metastable circuit synthesis.

### Keywords

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