Hardware Annealing Theory
Engineering optimization is an important subject in signal and image processing. A conventional searching technique for finding the optimal solution is to use gradient descent, which finds a direction for the next iteration from the gradient of the objective function. For complicated problems, the gradient descent technique often gets stuck at a local minimum where the objective function has surrounding barriers. In addition, the complexity of most combinational optimization problems increases dramatically with the problem size and makes it very difficult to obtain the global minimum within a reasonable amount of computational time. Several methods have been reported to assist the network output to escape from the local minima [1,2]. For example, the simulated annealing method is a heuristic approach which can be widely applied to the combinational optimization problems [3,4]; the solutions by the simulated annealing technique are close to the global minimum within a polynomial upper bound for the computational time and are independent of initial conditions; and the simulated annealing technique has been successfully applied in VLSI layout generation  and noise filtering in image processing .
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